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GPGPUs are GPUs capable of running General-purpose programs. The extent to which "general-purpose" is defined as being "general" varies considerably: varying from Microprocessor-grade to fully capable of running Operating Systems such as GNU/Linux. Examples of the former have instruction subsets similar to the 8086: MIAOW had bit manipulation, bitwise operations, Vector floating-point and branch.[1] whereas Larrabee was capable of running a full Linux OS.[2] When multiple hardware GPGPUs are grouped together into a Supercomputer it is termed a GPU cluster.[citation needed]
List of GPGPUs
[edit]For a list of GPU clusters see List of GPGPU Supercomputers
Larrabee
[edit]For Larrabee, Tom Forsyth[3] relates that it was capable of running a full Linux Operating System.[4] The only specialist hardware (fixed-function) was texture sampling units.[5] Larrabee is notable in that it became AVX512.[6]
RISC-V
[edit]Two RISC-V efforts in development include a GPGPU from Esperanto[7][8] and a consortium led by Atif Zazar to leverage RISC-V.[9][10][11] Esperanto offers a "direct" SDK to program individual cores, including the "accompanying vector/tensor unit" of each.[12]
Nyuzi
[edit]Nyuzi is a general-purpose processor with SIMD units.[13] A custom port of LLVM was developed.[14]
MIAOW
[edit]MIAOW implemented a subset of Southern Islands[15][16]
Vortex GPU
[edit]Vortex GPU implemented RISC-V RV32IMAF and RV64IMAFD (a General-Purpose CPU) and "bolted on" a SIMT execution engine with a minimal RISC-V ISA Extension.[17] Vortex GPU followed the same architecture as Larrabee by only providing specialist texture sampling hardware due to FPGA size limitations.[18]
See also
[edit]- GPU – Specialized electronic circuit; graphics accelerator
- Single instruction, multiple threads – Parallel Execution model which works simultaneously on arrays of several numbers
- Single instruction, multiple data – Type of parallel processing
References
[edit]- ^ https://pages.cs.wisc.edu/~vinay/pubs/MIAOW-coolchips-paper.pdf
- ^ "Tom Forsyth - the Lifecycle of an Instruction Set". 22 August 2020.
- ^ https://tomforsyth1000.github.io/larrabee/larrabee.html
- ^ "Tom Forsyth - the Lifecycle of an Instruction Set". 22 August 2020.
- ^ https://bpb-us-e1.wpmucdn.com/sites.gatech.edu/dist/e/466/files/2008/12/Larrabee_ECE4893.pdf
- ^ https://tomforsyth1000.github.io/larrabee/larrabee.html
- ^ "Esperanto exits stealth mode, aims at AI with a 4,096 core 7nm RISC-V monster". wikichip.org. January 2018. Retrieved 2 January 2018.
- ^ "Esperanto ET-SoC-1 1092 RISC-V AI Accelerator Solution at Hot Chips 33". 24 August 2021.
- ^ "Next Generation GPU Architectures – Evolving Graphics Hardware". Archived from the original on 18 September 2024.
- ^ "RV64X: A Free Open Source GPU for RISC-V". 27 January 2021.
- ^ "Y-BoBo/RV32I-GPU". GitHub.
- ^ "Esperanto Technologies Launches General Purpose SDK Enabling Customers to Accelerate Parallelized HPC Workloads - Esperanto Technologies". May 2023.
- ^ "Microarchitecture". GitHub.
- ^ "Compiler ABI". GitHub.
- ^ https://pages.cs.wisc.edu/~vinay/pubs/MIAOW_Architecture_Whitepaper.pdf
- ^ https://www.amd.com/content/dam/amd/en/documents/radeon-tech-docs/instruction-set-architectures/southern-islands-instruction-set-architecture.pdf
- ^ "Vortexgpgpu/Vortex". GitHub.
- ^ Tine, Blaise; Elsabbagh, Fares; Yalamarthy, Krishna; Kim, Hyesoon (2021). "Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch". arXiv:2110.10857 [cs.AR].